1. Field of the Invention
The present invention relates to an audio signal processor. Embodiments of the invention are concerned with the control of the dynamics of 1-bit audio signals.
2. Description of the Prior Art
It is known to convert an analogue signal to a digital form by sampling the analogue signal at at least the Nyquist rate and encoding the amplitudes of the samples by an m bit number. Thus if m=8, the sample is said to be quantized to an accuracy of 8 bits. In general m can be any number of bits equal to or greater than 1.
For the purpose of quantizing to only 1 bit, it is known to provide an analogue to digital converter (ADC) known either as a xe2x80x9cSigma-Delta ADCxe2x80x9d or as a xe2x80x9cDelta-Sigma ADCxe2x80x9d. Herein the term xe2x80x9cDelta-Sigmaxe2x80x9d is used. Such an ADC is described in for example xe2x80x9cA Simple Approach to Digital Signal Processingxe2x80x9d by Craig Marven and Gillian Ewers ISBN 0-904.047-00-8 published 1993 by Texas Instruments.
Referring to FIG. 1 in an example of such an ADC, the difference 1 (Delta) between an analogue input signal and the integral 2 (Sigma) of the 1-bit output signal is fed to a 1-bit quantizer 3. The output signal comprises bits of logical value 0 and 1 but representing actual values of xe2x88x921 and +1 respectively. The integrator 3 accumulates the 1-bit outputs so that value stored in it tends to follow the value of the analog signal. The quantizer 3 increases (+1) or reduces (xe2x88x921) the accumulated value by 1-bit as each bit is produced. The ADC requires a very high sampling rate to allow the production of an output bit stream the accumulated value of which follows the analogue signal.
The term xe2x80x9c1-bitxe2x80x9d signal as used in the following description and in the claims means a signal quantized to an accuracy of 1 digital bit such as is produced by a Delta-Sigma ADC.
It is also known that when an audio signal is quantized to 1-bit the audio information is obscured by the quantization noise to an unacceptable extent and it is imperative that the quantisation noise is suitably shaped. Noise shaping is shown diagrammatically in FIG. 2 where 21 denotes the noise shaping and 22 denotes the audio signal.
It is also known to control the dynamics of an audio signal. Control of dynamics includes the control of the dynamic range of the signal by:
a) limitation of the dynamic range
b) dynamic signal compression and
c) dynamic signal expansion.
Compression and expansion involve multiplying the signal by a gain factor dependent on the signal magnitude.
The present invention seeks to apply dynamics control to 1-bit audio signals.
According to one aspect of the present invention there is provided an audio signal processor for processing 1-bit signals, comprising:
an input for receiving a 1-bit signal,
means for applying a predetermined filter characteristic to the 1-bit signal whereby the signal is also converted to a p-bit signal where p is greater than one,
means for determining the absolute value of the p-bit signal,
means for producing a dynamics control signal dependent on the said absolute value,
means for applying the dynamics control signal to the 1-bit input signal, and
a Delta Sigma Modulator means for requantizing the dynamics controlled signal as a 1-bit signal and shaping the noise in the requantised 1-bit signal.
Thus the present invention provides dynamic control of a 1-bit signal.
In an embodiment of the invention, the producing means comprises means for forming the log base 2 of the p-bit signal, means for multiplying the log of the p-bit signal by a compression or expansion ratio and means for forming the anti-log thereof to produce the dynamics control signal.
According to another aspect of the present invention, there is provided a circuit a circuit for converting n-bit digital signal values to log base 2 values, comprising
n inputs for receiving respective bits of the n-bit signal,
shifting means for selectively shifting the bits of the n-bit signal towards the Most Significant Bit (MSB) position, and
shift control means for shifting the bits of the n-bit signal a number of shifts towards the MSB until the most significant logic 1 bit reaches the MSB position and for producing a digital value representing the said number of shifts,
the log base 2 value being represented by the said digital value representing the said number of shifts and the shifted bits output by the shifting means.
According to a further aspect of the invention, there is provided an anti-log circuit comprising:
n inputs for receiving the respective bits of the log base 2 values,
shifting means for selectively shifting the bits towards the Least Significant Bit Position, and
shift control means arranged to receive the said digital value representing the number of shifts, and operable to control the shifting means to shift the n-bits towards the LSB by the said number of shifts.